1. Field of the Invention
The present invention relates to an image sensing apparatus and an image capturing system.
2. Description of the Related Art
A general image sensing apparatus comprises pixels each including a photoelectric conversion unit, a charge-voltage converter which converts a signal based on an electric charge accumulated by the photoelectric conversion unit into a voltage, and a transfer MOS transistor which transfers the electric charge accumulated by the photoelectric conversion unit to the charge-voltage converter; and a driving unit which drives the pixels. If the transfer MOS transistor is an NMOS transistor, it is turned off by supplying the ground potential to its gate. With this operation, the photoelectric conversion unit starts a charge accumulation operation.
Under the circumstance, a demand has arisen for widening the dynamic range of each pixel by increasing the saturating signal amount of the photoelectric conversion unit. To meet this demand, Japanese Patent Laid-Open No. 2002-217397 discloses a technique of turning off the transfer MOS transistor by supplying a negative voltage VTXL to its gate.
In the technique disclosed in Japanese Patent Laid-Open No. 2002-217397, the driving unit includes a buffer circuit 30 for supplying a control signal to the gate of the transfer MOS transistor (see FIG. 2). The buffer circuit 30 has an inverter configuration in which an NMOS transistor 32 and PMOS transistor 31 have a common gate and drain. The common gate of the NMOS transistor 32 and PMOS transistor 31 is connected to an input terminal 33, and their common drain is connected to an output terminal 34. A negative voltage (e.g., −1.2V) is supplied to the source of the NMOS transistor 32.
In turning off the transfer MOS transistor (in accumulation), a power supply voltage (e.g., 5V) is supplied to the input terminal 33. With this operation, the voltage between the gate and source of the NMOS transistor 32 becomes equal to the difference (e.g., 6.2V) between the power supply voltage and the negative voltage. An electric field corresponding to the difference between the power supply voltage and the negative voltage is also supplied to the gate insulating film of the NMOS transistor 32.
Assume that the withstand voltage of the gate insulating film of the NMOS transistor 32 is set nearly equal to the difference (e.g., 5V) between the power supply voltage and the ground voltage. In this case, the gate insulating film of the NMOS transistor 32 is applied with an electric field larger than its withstand voltage in turning off the transfer MOS transistor (in accumulation). This may result in damage to the gate insulating film of the NMOS transistor 32.